Rohan Mistry

Electrical engineering student at the University of Waterloo. I build robotics, embedded systems, and hardware projects.

Embedded vision / robotics

Camera-Guided Drone Landing System

A camera-guided landing system that uses OpenCV to track the target, UART for communication, and a custom power stage so it can run directly from the drone battery.

  • OpenCV tracks the landing target and feeds the guidance loop.
  • UART handles communication between the device and drone electronics.
  • Custom voltage conversion lets the system plug into the drone battery without extra power modules.
  • Custom-created PCB footprints supported niche parts and nonstandard connectors.
  • Altium PCB fabricated with JLCPCB; enclosure and mounting designed in SolidWorks and 3D printed.
OpenCVUARTAltiumJLCPCBSolidWorksRaspberry Pi Zero 2 W

Embedded UI / fabrication

CNC 4-Axis Foam Cutter

A 4-axis foam cutter with a custom desktop control app, Arduino Uno firmware, and SolidWorks-designed printed parts for the motion system and mounts.

View GitHub
  • Built the control UI in Electron, Svelte, and Tailwind for loading jobs, previewing toolpaths, and sending machine commands.
  • Wrote custom Arduino Uno firmware to handle synchronized motion for the cutter axes.
  • Modeled and 3D printed the machine parts in SolidWorks for the carriage, mounts, and support hardware.
  • Used the UI to inspect the cut path before running the machine on foam wing sections.
ElectronSvelteTailwindArduino UnoSolidWorksCNC

Autonomous systems / robotics

VTOL Plane Avionics and Payload Docking System

Built the avionics and electronics for a VTOL plane running ArduPilot, plus the autonomous payload system that undocks after landing, parks itself, and later redocks using calibrated vision.

  • Owned the plane's avionics stack: ArduPilot configuration, GPS integration, telemetry, power distribution, and flight-control wiring.
  • Added the electronics for the detachable payload and kept the system organized around a regulated onboard power rail.
  • After landing, the payload undocks and uses an I2C color sensor to move to a parking spot in the landing zone corner.
  • OpenCV on a Raspberry Pi uses calibrated side and front cameras to find ArUco markers and line up the docking approach.
  • Motor control runs through a PID loop on Linux, with the full wiring documented for assembly and troubleshooting.
ArduPilotGPSOpenCVRaspberry PiI2CPIDMAVLink

Computer vision / performance

OpenCV calibrateCamera Overhaul

Optimized OpenCV's calibrateCamera runtime without changing outputs by restructuring the solver path and parallelizing Jacobian accumulation.

View PR
  • Used Schur-complement LM and parallel Jacobian accumulation to cut the calibration path from O(n^3) to O(n).
  • Added a performance test built around a 500-image chessboard dataset.
  • Ran regression checks to isolate behavior changes before pushing the patch.
  • Built and validated with CMake, Ninja, and Microsoft Visual Studio, then tracked the work through Git and GitHub.
OpenCVC++CMakeNinjaVisual StudioGit

AI / Machine Learning

Sequence AI

An AI for the board game Sequence with a batched GPU training pipeline and a PyTorch policy/value network.

View GitHub
  • A ResNet policy/value network in PyTorch drives self-play and training.
  • Multiple worker processes run simulations in parallel while a GPU server batches inference requests to optimize GPU throughput.
  • Training ran under Docker to keep the CUDA and PyTorch stack stable.
  • Loss curves and other metrics were tracked in TensorBoard during training.
PyTorchDockerCUDATensorBoardSequence

Computer engineering / SystemVerilog

Fly Sim

A CLI tool for compiling and running bare-metal C and C++ firmware on a bundled PicoRV32 simulation flow. Yosys synthesizes the HDL into a gate-level netlist intended for ASIC-style evaluation, and the fly-brain model is used to evaluate those gates by stimulating input neurons and checking output neurons against a precalibrated monitoring table.

View GitHub
  • The CPU design is synthesized with Yosys into a gate-level netlist before simulation.
  • The fly-brain model acts as the gate evaluator by stimulating specific input neurons and observing the resulting output neurons.
  • Output neuron activity is compared against a precalibrated monitoring table to check whether the gate behavior matches the target response.
SystemVerilogYosysHDL SynthesisPicoRV32CUDALinuxWSL
Contact

Open to projects, collaborations, and opportunities.

Email me at rm2mistr@uwaterloo.ca.

rm2mistr@uwaterloo.caResumeGitHubLinkedIn